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My Computers

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My Desktop Computer I

  • AMD Athlon 64 X2 4200+ (2.2GHz, 2 x 128KB L1 cache, 2 x 512KB L2 cache) - SGD 700
  • MSI K8N Neo4 Platinum (NForce4 Ultra) - SGD 295
  • TWINMOS 4 x 1GB DDR400 CL2.5 RAM (TwinMOS gives 1 to 1 exchange, but they can only give CL3 RAM) - SGD 764
  • MSI NX6600LE 256MB PCI-E display card - SGD 173
  • BenQ 16X DVD writer - SGD 82
  • LiteOn 40X CD writer
  • Western Digital Raptor 74GB SATA 10K RPM - SGD 307
  • Maxtor 300GB SATA 7.2K RPM - SGD 232

My Desktop Computer II

  • 2 x AMD Athlon MP 1.2GHz (128KB L1 cache, 256KB L2 cache)
  • Tyan TigerMP (AMD760MP)
  • 4 x 256MB DDR266 RAM
  • GeForce4 MX460 128MB AGP 4X display card
  • Sound Blaster Vibra 128
  • Pioneer 16X DVD writer (lend to friend)
  • 2 x Maxtor 40GB ATA 7.2K RPM (1 is crashed however)

Network Storage

  • LANDISK Pro with Seagate 500GB ATA133 7.2K RPM - SGD 128 + SGD 350

:( The memory error corrupts my file system! Luckily I backup my data often. So, I bought a network storage to enforce my backups. You dont want to lose any data such as your photo albums, do you? Damn it poor memory!

Dinner at VivoCity

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Cousin Cendawan changed job and got her first new salary. Our tradition is to have big feast :D. This time we had our dinner in a japanese restaurant.


The first side dish we had, worth SGD 20+. The fish bones were to be fried after we finished its meat. They took a long time to fry the fish bones, we thought they throw it to rubbish bin :p.



Cousin Cendawan and her best friend Evelyn.



Unagi Sushi set that I had, also worth SGD 20+. :p Nice and filling :) yummy



Unagi fried rice. Dont look down on this bowl of fried rice, it worths SGD 10 ;). This was the only set that helped to lower down the overall expenses (SGD 153 for 5 persons).



Cendawan's BF Mr. Thin eating steak worth at least SGD 15 I think. That whole plate had 1 and only 1 piece of steak :o. So he finished dinner the earliest.

Processor News

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Processor is the heart of a computing system. Multi-processors have been invented for decades. Recent technology advancement brings multi-processor in the form of dual-core, and upcoming quad-core to desktop users. Eventually, most desktop users will be using multi-core processors. It's getting interesting to see the advancement of multi-processor.

14 May 2007: AMD Names Athlon's Successor: Phenom
23 Apr 2007: AMD: Barcelona quad-core 50% faster than Intel’s quad-core Xeon
18 Apr 2007: Intel Penryn Performance Preview: The Fastest gets Faster
17 Apr 2007: Intel details Penryn performance, new SSE4 extensions
16 Apr 2007: Intel Developer Forum - Beijing 2007: Penryn and Intel's High End GPU
16 Apr 2007: Intel officially owns up to GPU plans with Larrabee
09 Apr 2007: Intel Core 2 Extreme QX6800: The Fastest Desktop CPU, now with more cores
09 Apr 2007: Intel Launches New Quad-core Processor for High-End PCs
04 Apr 2007: Apple Unveils Eight-Core Mac Pro
30 Mar 2007: Intel Clovertown: Quad Core for the Masses
30 Mar 2007: Quad-core heading to NEC's resilient servers
29 Mar 2007: CeBIT 2007: Storage & Servers
29 Mar 2007: Intel develops integrated memory controller for Nehalem processors
26 Mar 2007: The Gigahertz Battle: How Do Today's CPUs Stack Up?
22 Mar 2007: Intel vs. AMD: Today's generation compared
05 Mar 2007: The CPU redefined: AMD Torrenza and Intel CSI
01 Mar 2007: Barcelona Architecture: AMD on the Counterattack
27 Feb 2007: Dual Core Notebook CPUs Explored
20 Feb 2007: Does AMD's Athlon 64 X2 6000+ Have Any Kick Left?
20 Feb 2007: New AMD Desktop Processors Designed for Both Performance-Hungry and Energy-Conscious Users
13 Feb 2007: Intel to bring back Hyperthreading with Nehalem core
11 Feb 2007: AMD Reveals More 'Barcelona' Secrets
11 Feb 2007: AMD touts power consumption tech in quad core
11 Feb 2007: Intel Enters 'Tera-scale' Era
11 Feb 2007: Intel's GPU plans could include extending x86 ISA
11 Feb 2007: Intel shows off 80-core processor
09 Feb 2007: Gateway FX530: Mad Cows and Quad Core Overclocking
07 Feb 2007: AMD cranks out new Opterons
28 Jan 2007: Intel announces breakthrough ‘Penryn’ processor family; slated for production in second half 2007
16 Jan 2007: Intel shows 45-nm processor
11 Jan 2007: 500 MHz FSB? Core 2 Duo Overtakes Core 2 Extreme
10 Jan 2007: Intel Core 2 Duo E4300: Affordable and Highly Overclockable
08 Jan 2007: Can AMD'S 65 nm Core Fight Back?
21 Dec 2006: AMD's 65nm Preview Part 2 - The Plot Thickens (Updated with Information from AMD)
20 Dec 2006: A quick look at AMD's 65nm Athlon 64 X2 processors
18 Dec 2006: AMD Socket-F Opteron vs. Intel Woodcrest
15 Dec 2006: New-look Xeons and Opterons square off
14 Dec 2006: AMD's 65nm Brisbane Core Previewed: The most energy efficient AMD CPU to date
14 Dec 2006: AMD outlines plans for future processors
12 Dec 2006: AMD Rolls Out New Athlon Processors
11 Dec 2006: Intel adds another quad-core Xeon
11 Dec 2006: Intel Offers Fifth Quad-Core Processor
06 Dec 2006: A quick look at AMD's quad-core Barcelona
06 Dec 2006: Quad-Core Xeon Clovertown Rolls Into DP Servers
04 Dec 2006: AMD demos native quad-core processor
30 Nov 2006: AMD Quad FX Platform with Dual Socket Direct Connect Architecture Redefines High-End Computing for Megatasking Enthusiasts
30 Nov 2006: AMD's QuadFX (a.k.a. 4x4) disappoints
30 Nov 2006: AMD's Quad FX: Technically Quad Core
30 Nov 2006: AMD's 4x4 Platform & Athlon 64 FX-70 - Brute Force Quad Cores
29 Nov 2006: AMD blasts off Quad for PC DIYers
29 Nov 2006: Intel completes design of Penryn chip
10 Nov 2006: Intel's newest Quad Xeon MP versus HP's DL585 Quad Opteron
02 Nov 2006: Intel's Core 2 Extreme QX6700: The Multi-core Era Begins
01 Nov 2006: Kentsfield Released: Core 2 Quadro Ready to Ravage the High-End
26 Oct 2006: Cool Fusion: AMD's plan to revolutionise multi-core computing
26 Oct 2006: Intel Xeon and AMD Opteron Battle Head to Head
25 Oct 2006: AMD's "Fusion" processor to merge CPU and GPU
25 Oct 2006: AMD-ATI to Offer CPU/GPU Combo
23 Oct 2006: Intel bares Tigerton
23 Oct 2006: Intel sticks to dual-die processors
20 Oct 2006: Intel Looks to Solidify Quad-Core Lead
20 Oct 2006: Intel shows off sweet 16 server
20 Oct 2006: Intel shows off sweet 16 server
19 Oct 2006: AMD Quad-Father 4X4 Update: Configurations Come Into Focus
19 Oct 2006: Intel To Preview Quad-Core Xeon MP
19 Oct 2006: Intel to Tape Out First 45nm Processor in Q4 2006
19 Oct 2006: POWER6 set to carry the POWER4/POWER5/970 lineage forward?
18 Oct 2006: Intel to Ship Roughly 5-6 Million of Quad-Core Desktop Processors in 2007
17 Oct 2006: Intel Core 2 Duo 3.0GHz with 1333MHz Bus Incoming
13 Oct 2006: Take a Look Inside the G5-Based Dual-Processor Power Mac
12 Oct 2006: Fall Processor Forum: Power6 at 5 GHz
11 Oct 2006: AMD takes wraps off of quad-core design
11 Oct 2006: Fall Processor Forum: Niagara, Act Two
11 Oct 2006: Fall Processor Forum: SPARC64 VI and VII
10 Oct 2006: IBM's Power6 gets help with math, multimedia
10 Oct 2006: Quad-core Opteron faster at virtualization, AMD says
09 Oct 2006: Cavium Networks Introduces New OCTEON Plus Multi-core MIPS64 Processors with World's Highest Networking, Wireless and Security Performance
09 Oct 2006: Dual-core PowerPC SoC gains BSP, support
09 Oct 2006: IBM Strengthens Power Architecture with New Low-Power Processors
09 Oct 2006: LSI Logic rolls next-gen media processor architecture
09 Oct 2006: Terra Soft to Build World's First Cell-Based Supercomputer
02 Oct 2006: Intel’s Next-Generation Processors to Support SSE4
03 Oct 2006: Quad-core processor forecast

FPGA News

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FPGA (Field Programmable Gate Array) is an emerging technology in embedded systems and computation accelerator for high performance computing.

29 Apr 2007: Altera Announces FPGA-Based Accelerator Support for Intel Front Side Bus
16 Jan 2007: HP claims FPGA breakthrough
15 Jan 2007: Mitrion FPGA Supercomputing Platform Now Available With Xilinx Synthesis and Place & Route Software
15 Jan 2007: Xilinx offers faster FPGA design
14 Nov 2006: Computational Bottlenecks and Hardware Decisions for FPGAs
13 Nov 2006: XtremeData Announces Upcoming FPGA-Supercomputing Support for Mitrion Virtual Processor and Mitrion Development Platform
23 Oct 2006: Celoxica Ships HTX FPGA Acceleration Solution
23 Oct 2006: Lattice Announces Availability of Serial RapidIO Core From Mercury Computer Systems
23 Oct 2006: New Lattice Design Tools Deliver Comprehensive New Product Support, Innovative HDL Management Tool
21 Oct 2006: New Image Processing Development Platform Empowers System Designers
20 Oct 2006: QuickLogic - Ultra low-power FPGA family extends to 300,000 gates
20 Oct 2006: Xilinx Demonstrates Low Power Solutions for Radio Modem and Cryptography At MILCOM 2006
19 Oct 2006: Synplicity, Achronix collaborating on FPGA synthesis
18 Oct 2006: Xilinx Extends Platform FPGA with Microblaze Soft Processor
12 Oct 2006: FPGAs: Architectural Innovations Open Up New Applications
12 Oct 2006: Xilinx extends platform FPGA performance with MicroBlaze soft processor
10 Oct 2006: QuickLogic expands PolarPro family with 300K-gate FPGA
09 Oct 2006: ClearSpeed accelerates largest supercomputer in Japan
09 Oct 2006: ClearSpeed Accelerates Tokyo Tech Supercomputer
09 Oct 2006: Xilinx Extends Platform FPGA Performance with Award Winning MicroBlaze Soft Processor
21 Aug 2006: IP core speeds design of Interlaken-based networks
xx Jul 2006: FPGA design security
xx Jul 2006: Right architecture for 65nm FPGAs
27 Jun 2006: IBM, ClearSpeed team up on supercomputing

News

All news about processors, FPGA, softwares, programming, ...... come in here.

FPGA Optimization

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C-level Optimization such as in Impulse C

  1. Limit the amount of hardware resources used by introducing loops.
  2. Split arrays for multiple storage accesses. Storage for each array can be constructed to stream directly into local computation unit, i.e. parallel local memory accesses. Note that register bank can be read by many sources in the same cycle. Thus, small & hot data should go into register.
  3. Improve communication performance by fully utilizing the CPU-FPGA bus width. Transfer more bits at a time matching the CPU-FPGA bus width. DMA is another feasible mechanism for communication. But it will hog the bus if you do it too frequently.
  4. Loop unrolling to realize higher parallelism using more gates in FPGA.
  5. Pipelining in main loop to close the communication gaps of different iterations due to data loading & flushing.

Reference: Optimizing Impulse C Code for Performance by Scott Thibault & David Pellerin.

Logic-level Optimization in Boolean Network model

  • Restructuring operations.
    • Reduce dependent inputs.
    • Factorize.
    • Substitute.
    • Eliminate.
  • Node minimization.
    • Minimize using dont-care inputs.
    • ...

Binary Decision Diagram

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BDD (Binary Decision Diagram) is a DAG (Directed Acyclic Graph). A node represents a logic function. A out-going directed edge is associated with the output of the node. Looked like a state machine ha?

Terminology

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CLB: Configurable Logic Block.
FPGA: Field Programmable Gate Array.
HDL: Hardware Description Language.
LUT: Look Up Table.

FPGA?

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FPGA (Field Programmable Gate Array) is becoming the buzz word in High Performance Computing. }:) 30x speed up results are commonly reported for various applications. Progeniq reported significant speed up on ClustalW software, a Bioinformatics application. :o

But, can you imagine using logic gates to perform tasks in a typical C program? Of course a C-to-FPGA compiler (e.g. Handel-C, Impulse C, SystemC) solves the problem. But, using FPGA does not automatically guarantee good speed up. The amount of logic gates, and the longest path in the logic gates must be minimized. These minimizations are difficult for the compiler. Hence, some efforts are required to help the compiler to achieve good performance.

The key for FPGA to success:

  1. Quick conversions of existing programs for wide user coverage.
  2. High performance, significantly faster than general purpose processors.
  3. Portable performance to various FPGA chips.
  4. Cheap is good.

Lex & Yacc

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lex-exp1.l:
%{
/* C code section */
#include <stdio.h>
#include "y.tab.h"    /* Include tokens generated by Yacc */
%}

num     [0-9]+

%%
{num}   { printf("Number: %s\t token: %d\n", yytext, NUMBER) ;
          return NUMBER ;
        }

[a-z]+  { printf("Text: ") ;
          ECHO ; /* Macro to print the current matching text. */
          printf("\n") ;
          return TEXT ;
        }
\n      return '\n' ;
.       ;
%%

/* A routine that will be called at end of file reading. */
int yywrap()
{       /* return 1: No more input files.
           return 0: More input files. */
        return 1 ;
}
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