FPGA

DMA:

Prototype: co_memory co_memory_create(const char *name, const char *loc, size_t size);  
// "Name" is used by external application to identify this memory.
// Create 64 bytes memory from the heap. loc is architecture dependent.
co_memory_create("name", "heap0", 64);

Prototype: void co_memory_readblock(co_memory mem, unsigned int offset, void *buf, size_t buffersize);
Prototype: void co_memory_writeblock(co_memory mem, unsigned int offset, void *buf, size_t buffersize);
Prototype: void *co_memory_ptr(co_memory mem); // Return a C pointer to the buffer of the shared memory.

Fixed-Point Arithmetic:
Example of format specification - 1s8.23 => 1 sign bit, 8 bit integer, 23 bit fraction.
We can choose several modes: saturation, floor, ceil.

co_int16 a = (co_int16) FXCONST16(96,7); // a <- 96 in 1s8.7 format.
c = FXADD16(a,b,8); // Add a and b in 1s7.8 format.
c = FXMUL32(a,b,8); // Multiply a and b in 1s7.8 format.
c = FXDIV16(a,b,10); // c <- a/b in 1s6.9 format.

Macros: FXADD8(), FXADD16(), FXADD32(), FXMUL8(), FXMUL16(), FXMUL32(), ...

C-level Optimization such as in Impulse C

1. Limit the amount of hardware resources used by introducing loops.
2. Split arrays for multiple storage accesses. Storage for each array can be constructed to stream directly into local computation unit, i.e. parallel local memory accesses. Note that register bank can be read by many sources in the same cycle. Thus, small & hot data should go into register.
3. Improve communication performance by fully utilizing the CPU-FPGA bus width. Transfer more bits at a time matching the CPU-FPGA bus width. DMA is another feasible mechanism for communication. But it will hog the bus if you do it too frequently.
4. Loop unrolling to realize higher parallelism using more gates in FPGA.
5. Pipelining in main loop to close the communication gaps of different iterations due to data loading & flushing.

Reference: Optimizing Impulse C Code for Performance by Scott Thibault & David Pellerin.

Logic-level Optimization in Boolean Network model

• Restructuring operations.
  • Reduce dependent inputs.
  • Factorize.
  • Substitute.
  • Eliminate.
• Node minimization.
  • Minimize using dont-care inputs.
  • ...